A Scalable VLSI Architecture for Soft-Input Soft-Output Depth-First Sphere Decoding

Multiple-input multiple-output (MIMO) wireless transmission imposes huge challenges on the design of efficient hardware architectures for iterative receivers. A major challenge is soft-input soft-output (SISO) MIMO demapping, often approached by sphere decoding (SD). In this paper, we introduce the - to our best knowledge - first VLSI architecture for SISO SD applying a single tree-search approach. Compared with a soft-output-only base architecture similar to the one proposed by Studer et al. in IEEE J-SAC 2008, the architectural modifications for soft input still allow a one-node-per-cycle execution. For a 4x4 16-QAM system, the area increases by 57% and the operating frequency degrades by 34% only.Comment: Accepted for IEEE Transactions on Circuits and Systems II Express Briefs, May 2010. This draft from April 2010 will not be updated any more. Please refer to IEEE Xplore for the final version. *) The final publication will appear with the modified title "A Scalable VLSI Architecture for Soft-Input Soft-Output Single Tree-Search Sphere Decoding

A 2.78 mm2 65 nm CMOS Gigabit MIMO Iterative Detection and Decoding Receiver

Iterative detection and decoding (IDD), combined with spatial-multiplexing multiple-input multiple-output (MIMO) transmission, is a key technique to improve spectral efficiency in wireless communications. In this paper we present the—to the best of our knowledge—first complete silicon implementation of a MIMO IDD receiver. MIMO detection is performed by a multi-core sphere decoder supporting up to 4×4 as antenna configuration and 64-QAM modulation. A flexible low-density parity check decoder is used for forward error correction. The 65 nm CMOS ASIC has a core area of 2.78 mm2 . Its maximum throughput exceeds 1 Gbit/s, at less than 1 nJ/bit. The MIMO IDD ASIC enables more than 2 dB performance gains with respect to non-iterative receivers

A seamless software defined radio development flow for waveform and prototype debugging, Journal of Telecommunications and Information Technology, 2008, nr 2

With the increasing number of wireless communication standards flexibility has gained more and more importance which has lead to the software defined radio (SDR) concept. However, SDR development has to face many challenges, among them are the questions how SDR systems can be designed to achieve flexibility, architectural efficiency, energy efficiency and portability at the same time. These requirements result in very elaborate architectures and a highly increased design complexity. To cope with such complexity, we proposed an SDR development flow. During the development of such SDR, debugging becomes more efficient on a prototype hardware implementation than on a simulation model. However, error analysis on a prototype suffers from strong limitations like a reduced state visibility. In this paper, an extension to the SDR development flow is presented and successfully applied to an example SDR. It allows for an efficient error analysis with the SDR simulation model by the feedback of stimulus data from the prototype

The antisaccade task as an index of sustained goal activation in working memory: modulation by nicotine

The antisaccade task provides a laboratory analogue of situations in which execution of the correct behavioural response requires the suppression of a more prepotent or habitual response. Errors (failures to inhibit a reflexive prosaccade towards a sudden onset target) are significantly increased in patients with damage to the dorsolateral prefrontal cortex and patients with schizophrenia. Recent models of antisaccade performance suggest that errors are more likely to occur when the intention to initiate an antisaccade is insufficiently activated within working memory. Nicotine has been shown to enhance specific working memory processes in healthy adults. MATERIALS AND METHODS: We explored the effect of nicotine on antisaccade performance in a large sample (N = 44) of young adult smokers. Minimally abstinent participants attended two test sessions and were asked to smoke one of their own cigarettes between baseline and retest during one session only. RESULTS AND CONCLUSION: Nicotine reduced antisaccade errors and correct antisaccade latencies if delivered before optimum performance levels are achieved, suggesting that nicotine supports the activation of intentions in working memory during task performance. The implications of this research for current theoretical accounts of antisaccade performance, and for interpreting the increased rate of antisaccade errors found in some psychiatric patient groups are discussed

O31 Integrative analysis reveals a molecular stratification of systemic autoimmune diseases

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Efficiency and flexibility trade-offs for soft input soft output sphere decoding architectures

In the past decades, improved algorithms and more densely integrated circuits enabled rapid progress in the area of mobile communications. The fast proliferation of mobile multimedia content and the exponentially increasing data rates demand for more and more efficient wireless transmission principles and receivers. An approach called "MIMO" (multiple input, multiple output) improves the spectral efficiency by transmitting multiple data streams concurrently within the same bandwidth by using multiple transmit and receive antennas. This approach is already part of several mobile communication standards such as LTE, WLAN and HSPA. Aside from an increasing efficiency, mobile receivers need to support a rapidly growing number of communication standards as well as updates after fabrication. Therefore, the trend towards flexibility is also relevant for physical layer receiver architectures. However, flexibility causes costs (e.g. in terms of chip area or energy consumption) which can be orders of magnitude higher than for application specific integrated circuits. In the context of this thesis, efficiency and flexibility aspects have been investigated for "Sphere-Decoding" (SD), an important class of MIMO receiver algorithms. By iterative feedback of bitwise reliability information ("soft-input soft-output", SISO) between the MIMO demodulator and the channel decoder, a spectral efficiency near the theoretical limits can be achieved. The algorithmic basis for SISO SD is well known for some time. However, due to the high complexity of SISO SD, up to the beginning of this work only architectures existed which support the non-iterative soft-output SD. The first SISO SD architecture has been developed in the context of this thesis. It provides a high efficiency with a limited flexibility which allows switching antenna and modulation configurations at runtime. Beyond this architecture, SISO SD implementations for representative programmable architectures have been investigated. The resulting analysis provides an important insight into the trade-offs between efficiency, flexibility and portability of this class of algorithms. Such iterative demodulation/decoding architectures cannot be compared by single points of operations due to their inherent trade-off between complexity and spectral efficiency. Therefore, a special analysis approach has been elaborated as part of this work which enables comparisons under preferably identical scenarios (error rates, throughput latency and chip area). This approach enables reasonable and fair comparisons of complexity, efficiency and flexibility of very different architectures. Based on these analyses, points of operation can be estimated which allow an economic use of SISO-SD architectures in future mobile receivers